{"id":1421,"date":"2026-05-08T22:16:14","date_gmt":"2026-05-08T14:16:14","guid":{"rendered":"http:\/\/www.hanhhsir.cn\/?p=1421"},"modified":"2026-05-08T22:32:44","modified_gmt":"2026-05-08T14:32:44","slug":"%e5%9f%ba%e4%ba%8eahb%e7%9a%84%e5%9b%9b%e9%80%9a%e9%81%93dma%e6%8e%a7%e5%88%b6%e5%99%a8%e8%ae%be%e8%ae%a1-dmac-v","status":"publish","type":"post","link":"http:\/\/www.hanhhsir.cn\/index.php\/2026\/05\/08\/%e5%9f%ba%e4%ba%8eahb%e7%9a%84%e5%9b%9b%e9%80%9a%e9%81%93dma%e6%8e%a7%e5%88%b6%e5%99%a8%e8%ae%be%e8%ae%a1-dmac-v\/","title":{"rendered":"\u57fa\u4e8eAHB\u7684\u56db\u901a\u9053DMA\u63a7\u5236\u5668\u8bbe\u8ba1-dmac.v"},"content":{"rendered":"

dmac.v = DMA \u63a7\u5236\u5668\u9876\u5c42\u4f8b\u5316\/\u8fde\u7ebf\u6a21\u5757<\/strong><\/span>
\n\u4f5c\u7528\uff1a\u628a\u4f60\u524d\u9762\u770b\u8fc7\u7684\u6240\u6709\u5b50\u6a21\u5757\u4f8b\u5316+\u63a5\u7ebf\uff0c\u62fc\u6210\u5b8c\u6574\u53ef\u7528\u7684DMA\u63a7\u5236\u5668\u3002<\/strong><\/span>
\n\u5b83\u81ea\u5df1\u4e0d\u505a\u903b\u8f91\uff0c\u53ea\u8d1f\u8d23\u642d\u67b6\u5b50\u3001\u8fde\u4fe1\u53f7\u7ebf\u3002<\/strong><\/span><\/p>\n

`timescale 1ns\/10ps<\/span><\/p>\n

\/\/ ==============================<\/strong><\/span>
\n\/\/ \u6a21\u5757\uff1aDMA \u63a7\u5236\u5668\u9876\u5c42<\/strong><\/span>
\n\/\/ \u529f\u80fd\uff1a\u4f8b\u5316\u6240\u6709\u5b50\u6a21\u5757\uff0c\u5b8c\u6210\u4fe1\u53f7\u8fde\u63a5\uff0c\u6784\u6210\u5b8c\u6574DMA\u7cfb\u7edf<\/strong><\/span>
\n\/\/ ==============================<\/strong><\/span>
\nmodule dmac(<\/span>
\n\u00a0 \u00a0 \u00a0 \u00a0 \u00a0\/\/ AHB \u4ece\u673a\u63a5\u53e3\uff08CPU \u914d\u7f6e DMA \u7528\uff09<\/span>
\n\u00a0 \u00a0 \u00a0 \u00a0 \u00a0input HCLK, \/\/ \u65f6\u949f<\/span>
\n\u00a0 \u00a0 \u00a0 \u00a0 \u00a0input HRESETn, \/\/ \u4f4e\u7535\u5e73\u590d\u4f4d<\/span><\/p>\n

\u00a0 \u00a0 \u00a0 \u00a0 \u00a0input HSEL_SLV, \/\/ \u4ece\u673a\u9009\u4e2d<\/span>
\n\u00a0 \u00a0 \u00a0 \u00a0 \u00a0input HREADYIN_SLV, \/\/ \u4ece\u673a\u5c31\u7eea\u8f93\u5165<\/span>
\n\u00a0 \u00a0 \u00a0 \u00a0 \u00a0input [1:0] HTRANS_SLV, \/\/ \u4f20\u8f93\u7c7b\u578b<\/span>
\n\u00a0 \u00a0 \u00a0 \u00a0 \u00a0input [2:0] HSIZE_SLV, \/\/ \u4f4d\u5bbd<\/span>
\n\u00a0 \u00a0 \u00a0 \u00a0 \u00a0input HWRITE_SLV, \/\/ \u8bfb\u5199<\/span>
\n\u00a0 \u00a0 \u00a0 \u00a0 \u00a0input [31:0]HADDR_SLV, \/\/ \u5730\u5740<\/span>
\n\u00a0 \u00a0 \u00a0 \u00a0 \u00a0input [31:0]HWDATA_SLV, \/\/ \u5199\u6570\u636e<\/span>
\n\u00a0 \u00a0 \u00a0 \u00a0 \u00a0output HREADYOUT_SLV, \/\/ \u5c31\u7eea\u8f93\u51fa<\/span>
\n\u00a0 \u00a0 \u00a0 \u00a0 \u00a0output HRESP_SLV, \/\/ \u54cd\u5e94<\/span>
\n\u00a0 \u00a0 \u00a0 \u00a0 \u00a0output [31:0]HRDATA_SLV, \/\/ \u8bfb\u6570\u636e<\/span><\/p>\n

\u00a0 \u00a0 \u00a0 \u00a0 \u00a0\/\/ AHB \u4e3b\u673a\u63a5\u53e3\uff08DMA \u8bbf\u95ee\u5185\u5b58\/\u5916\u8bbe\u7528\uff09<\/span>
\n\u00a0 \u00a0 \u00a0 \u00a0 \u00a0output HSEL, \/\/ \u4e3b\u673a\u9009\u4e2d\u4ece\u8bbe\u5907<\/span>
\n\u00a0 \u00a0 \u00a0 \u00a0 \u00a0output [1:0] HTRANS, \/\/ \u4f20\u8f93\u7c7b\u578b<\/span>
\n\u00a0 \u00a0 \u00a0 \u00a0 \u00a0output [2:0] HSIZE, \/\/ \u4f4d\u5bbd<\/span>
\n\u00a0 \u00a0 \u00a0 \u00a0 \u00a0output HWRITE, \/\/ \u8bfb\u5199<\/span>
\n\u00a0 \u00a0 \u00a0 \u00a0 \u00a0output [31:0]HADDR, \/\/ \u5730\u5740<\/span>
\n\u00a0 \u00a0 \u00a0 \u00a0 \u00a0output [31:0]HWDATA, \/\/ \u5199\u6570\u636e<\/span>
\n\u00a0 \u00a0 \u00a0 \u00a0 \u00a0input HREADY_IN, \/\/ \u4ece\u8bbe\u5907\u5c31\u7eea<\/span>
\n\u00a0 \u00a0 \u00a0 \u00a0 \u00a0input HRESP, \/\/ \u54cd\u5e94<\/span>
\n\u00a0 \u00a0 \u00a0 \u00a0 \u00a0input [31:0]HRDATA, \/\/ \u8bfb\u6570\u636e<\/span><\/p>\n

\u00a0 \u00a0 \u00a0 \u00a0 \u00a0\/\/ \u5916\u90e8\u901a\u9053\u8bf7\u6c42\/\u5e94\u7b54\uff08\u5916\u90e8\u6a21\u5757\u89e6\u53d1DMA\uff09<\/span>
\n\u00a0 \u00a0 \u00a0 \u00a0 \u00a0input req_0,<\/span>
\n\u00a0 \u00a0 \u00a0 \u00a0 \u00a0output ack_0,<\/span>
\n\u00a0 \u00a0 \u00a0 \u00a0 \u00a0input req_1,<\/span>
\n\u00a0 \u00a0 \u00a0 \u00a0 \u00a0output ack_1,<\/span>
\n\u00a0 \u00a0 \u00a0 \u00a0 \u00a0input req_2,<\/span>
\n\u00a0 \u00a0 \u00a0 \u00a0 \u00a0output ack_2,<\/span>
\n\u00a0 \u00a0 \u00a0 \u00a0 \u00a0input req_3,<\/span>
\n\u00a0 \u00a0 \u00a0 \u00a0 \u00a0output ack_3<\/span>
\n);<\/span><\/p>\n

\/\/ ==============================<\/strong><\/span>
\n\/\/ \u5185\u90e8\u8fde\u7ebf\uff08wire\uff09\uff1a\u5b50\u6a21\u5757\u4e4b\u95f4\u7684\u4fe1\u53f7\u7ebf<\/strong><\/span>
\n\/\/ ==============================<\/strong><\/span>
\nwire [9:0] ch_0_size, ch_1_size, ch_2_size, ch_3_size;<\/span>
\nwire [31:0] ch_0_sour, ch_0_dest;<\/span>
\nwire [31:0] ch_1_sour, ch_1_dest;<\/span>
\nwire [31:0] ch_2_sour, ch_2_dest;<\/span>
\nwire [31:0] ch_3_sour, ch_3_dest;<\/span><\/p>\n

wire ch_0_en, ch_1_en, ch_2_en, ch_3_en;<\/span>
\nwire ch_0_target, ch_1_target, ch_2_target, ch_3_target;<\/span><\/p>\n

wire wr, rd;<\/span>
\nwire [31:0] addr, wdata, rdata;<\/span>
\nwire rd_en;<\/span>
\nwire req_done;<\/span><\/p>\n

wire en_0,en_1,en_2,en_3;<\/span>
\nwire ch_0_t0_done,ch_1_t0_done,ch_2_t0_done,ch_3_t0_done;<\/span><\/p>\n

wire fifo_0_empty,fifo_1_empty,fifo_2_empty,fifo_3_empty;<\/span>
\nwire fifo_0_full,fifo_1_full,fifo_2_full,fifo_3_full;<\/span><\/p>\n

wire wr_fifo_0,wr_fifo_1,wr_fifo_2,wr_fifo_3;<\/span>
\nwire rd_fifo_0,rd_fifo_1,rd_fifo_2,rd_fifo_3;<\/span>
\nwire [31:0] wr_fifo_data_0,wr_fifo_data_1,wr_fifo_data_2,wr_fifo_data_3;<\/span>
\nwire [31:0] rd_fifo_data_0,rd_fifo_data_1,rd_fifo_data_2,rd_fifo_data_3;<\/span><\/p>\n

\/\/ ==============================<\/strong><\/span>
\n\/\/ 1. \u4f8b\u5316\uff1aDMA \u914d\u7f6e\u63a5\u53e3\uff08CPU \u914d\u7f6e DMA\uff09<\/strong><\/span>
\n\/\/ ==============================<\/strong><\/span>
\ndmac_intf u_dmac_intf(<\/span>
\n\u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0.HCLK (HCLK),<\/span>
\n\u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0.HRESETn (HRESETn),<\/span>
\n\u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0.HSEL (HSEL_SLV),<\/span>
\n\u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0.HREADY (HREADYIN_SLV),<\/span>
\n\u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0.HTRANS (HTRANS_SLV),<\/span>
\n\u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0.HSIZE (HSIZE_SLV),<\/span>
\n\u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0.HWRITE (HWRITE_SLV),<\/span>
\n\u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0.HADDR (HADDR_SLV),<\/span>
\n\u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0.HWDATA (HWDATA_SLV),<\/span>
\n\u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0.HREADYOUT (HREADYOUT_SLV),<\/span>
\n\u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0.HRESP (HRESP_SLV),<\/span>
\n\u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0.HRDATA (HRDATA_SLV),<\/span><\/p>\n

\u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0.ch_0_en (ch_0_en),<\/span>
\n\u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0.ch_0_target (ch_0_target),<\/span>
\n\u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0.ch_0_size (ch_0_size),<\/span>
\n\u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0.ch_1_en (ch_1_en),<\/span>
\n\u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0.ch_1_target (ch_1_target),<\/span>
\n\u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0.ch_1_size (ch_1_size),<\/span>
\n\u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0.ch_2_en (ch_2_en),<\/span>
\n\u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0.ch_2_target (ch_2_target),<\/span>
\n\u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0.ch_2_size (ch_2_size),<\/span>
\n\u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0.ch_3_en (ch_3_en),<\/span>
\n\u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0.ch_3_target (ch_3_target),<\/span>
\n\u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0.ch_3_size (ch_3_size),<\/span><\/p>\n

\u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0.ch_0_sour (ch_0_sour),<\/span>
\n\u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0.ch_0_dest (ch_0_dest),<\/span>
\n\u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0.ch_1_sour (ch_1_sour),<\/span>
\n\u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0.ch_1_dest (ch_1_dest),<\/span>
\n\u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0.ch_2_sour (ch_2_sour),<\/span>
\n\u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0.ch_2_dest (ch_2_dest),<\/span>
\n\u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0.ch_3_sour (ch_3_sour),<\/span>
\n\u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0.ch_3_dest (ch_3_dest)<\/span>
\n);<\/span><\/p>\n

\/\/ ==============================<\/strong><\/span>
\n\/\/ 2. \u4f8b\u5316\uff1aAHB \u4e3b\u673a\u63a7\u5236\u5668\uff08DMA \u53d1\u603b\u7ebf\u65f6\u5e8f\uff09<\/strong><\/span>
\n\/\/ ==============================<\/strong><\/span>
\ndmac_ahb_ctrl u_dmac_ahb_ctrl(<\/span>
\n\u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0.clk (HCLK),<\/span>
\n\u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0.rst (HRESETn),<\/span>
\n\u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0.wr (wr),<\/span>
\n\u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0.rd (rd),<\/span>
\n\u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0.addr (addr),<\/span>
\n\u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0.wdata (wdata),<\/span>
\n\u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0.rdata (rdata),<\/span>
\n\u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0.rd_en (rd_en),<\/span>
\n\u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0.hsel (HSEL),<\/span>
\n\u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0.htrans (HTRANS),<\/span>
\n\u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0.hsize (HSIZE),<\/span>
\n\u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0.hwrite (HWRITE),<\/span>
\n\u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0.haddr (HADDR),<\/span>
\n\u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0.hwdata (HWDATA),<\/span>
\n\u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0.hreadyin (HREADY_IN),<\/span>
\n\u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0.hresp (HRESP),<\/span>
\n\u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0.hrdata (HRDATA)<\/span>
\n);<\/span><\/p>\n

\/\/ ==============================<\/strong><\/span>
\n\/\/ 3. \u4f8b\u5316\uff1aDMA \u901a\u9053\u63a7\u5236\uff084\u901a\u9053\u8bfb\u5199\u3001FIFO\u3001\u5730\u5740\u751f\u6210\uff09<\/strong><\/span>
\n\/\/ ==============================<\/strong><\/span>
\ndmac_channel_ctrl u_dmac_channel_ctrl(<\/span>
\n\u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0.clk (HCLK),<\/span>
\n\u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0.rst (HRESETn),<\/span>
\n\u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0.req_0 (req_0),<\/span>
\n\u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0.req_1 (req_1),<\/span>
\n\u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0.req_2 (req_2),<\/span>
\n\u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0.req_3 (req_3),<\/span>
\n\u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0.wr (wr),<\/span>
\n\u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0.rd (rd),<\/span>
\n\u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0.addr (addr),<\/span>
\n\u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0.wdata (wdata),<\/span>
\n\u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0.rdata (rdata),<\/span>
\n\u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0.rd_en (rd_en),<\/span>
\n\u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0.en_0 (en_0),<\/span>
\n\u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0.en_1 (en_1),<\/span>
\n\u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0.en_2 (en_2),<\/span>
\n\u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0.en_3 (en_3),<\/span>
\n\u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0.target_0 (ch_0_target),<\/span>
\n\u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0.target_1 (ch_1_target),<\/span>
\n\u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0.target_2 (ch_2_target),<\/span>
\n\u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0.target_3 (ch_3_target),<\/span>
\n\u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0.ch_0_size (ch_0_size),<\/span>
\n\u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0.ch_1_size (ch_1_size),<\/span>
\n\u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0.ch_2_size (ch_2_size),<\/span>
\n\u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0.ch_3_size (ch_3_size),<\/span>
\n\u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0.ch_0_sour (ch_0_sour),<\/span>
\n\u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0.ch_0_dest (ch_0_dest),<\/span>
\n\u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0.ch_1_sour (ch_1_sour),<\/span>
\n\u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0.ch_1_dest (ch_1_dest),<\/span>
\n\u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0.ch_2_sour (ch_2_sour),<\/span>
\n\u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0.ch_2_dest (ch_2_dest),<\/span>
\n\u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0.ch_3_sour (ch_3_sour),<\/span>
\n\u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0.ch_3_dest (ch_3_dest),<\/span>
\n\u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0.fifo_0_empty (fifo_0_empty),<\/span>
\n\u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0.fifo_1_empty (fifo_1_empty),<\/span>
\n\u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0.fifo_2_empty (fifo_2_empty),<\/span>
\n\u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0.fifo_3_empty (fifo_3_empty),<\/span>
\n\u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0.fifo_0_full (fifo_0_full),<\/span>
\n\u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0.fifo_1_full (fifo_1_full),<\/span>
\n\u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0.fifo_2_full (fifo_2_full),<\/span>
\n\u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0.fifo_3_full (fifo_3_full),<\/span>
\n\u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0.wr_fifo_0 (wr_fifo_0),<\/span>
\n\u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0.wr_fifo_data_0 (wr_fifo_data_0),<\/span>
\n\u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0.rd_fifo_0 (rd_fifo_0),<\/span>
\n\u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0.rd_fifo_data_0 (rd_fifo_data_0),<\/span>
\n\u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0.wr_fifo_1 (wr_fifo_1),<\/span>
\n\u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0.wr_fifo_data_1 (wr_fifo_data_1),<\/span>
\n\u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0.rd_fifo_1 (rd_fifo_1),<\/span>
\n\u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0.rd_fifo_data_1 (rd_fifo_data_1),<\/span>
\n\u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0.wr_fifo_2 (wr_fifo_2),<\/span>
\n\u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0.wr_fifo_data_2 (wr_fifo_data_2),<\/span>
\n\u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0.rd_fifo_2 (rd_fifo_2),<\/span>
\n\u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0.rd_fifo_data_2 (rd_fifo_data_2),<\/span>
\n\u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0.wr_fifo_3 (wr_fifo_3),<\/span>
\n\u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0.wr_fifo_data_3 (wr_fifo_data_3),<\/span>
\n\u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0.rd_fifo_3 (rd_fifo_3),<\/span>
\n\u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0.rd_fifo_data_3 (rd_fifo_data_3),<\/span>
\n\u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0.hready_in (HREADY_IN),<\/span>
\n\u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0.req_done (req_done),<\/span>
\n\u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0.ch_0_t0_done (ch_0_t0_done),<\/span>
\n\u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0.ch_1_t0_done (ch_1_t0_done),<\/span>
\n\u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0.ch_2_t0_done (ch_2_t0_done),<\/span>
\n\u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0.ch_3_t0_done (ch_3_t0_done)<\/span>
\n);<\/span><\/p>\n

\/\/ ==============================<\/strong><\/span>
\n\/\/ 4. \u4f8b\u5316\uff1aDMA \u4ef2\u88c1\u5668\uff084\u901a\u9053\u62a2\u603b\u7ebf\uff09<\/strong><\/span>
\n\/\/ ==============================<\/strong><\/span>
\ndmac_arb u_dmac_arb(<\/span>
\n\u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0.clk (HCLK),<\/span>
\n\u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0.rst (HRESETn),<\/span>
\n\u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0.req_0 (req_0),<\/span>
\n\u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0.req_1 (req_1),<\/span>
\n\u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0.req_2 (req_2),<\/span>
\n\u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0.req_3 (req_3),<\/span>
\n\u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0.ch_0_en (ch_0_en),<\/span>
\n\u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0.ch_1_en (ch_1_en),<\/span>
\n\u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0.ch_2_en (ch_2_en),<\/span>
\n\u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0.ch_3_en (ch_3_en),<\/span>
\n\u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0.target_0 (ch_0_target),<\/span>
\n\u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0.target_1 (ch_1_target),<\/span>
\n\u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0.target_2 (ch_2_target),<\/span>
\n\u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0.target_3 (ch_3_target),<\/span>
\n\u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0.en_0 (en_0),<\/span>
\n\u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0.en_1 (en_1),<\/span>
\n\u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0.en_2 (en_2),<\/span>
\n\u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0.en_3 (en_3),<\/span>
\n\u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0.ack_0 (ack_0),<\/span>
\n\u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0.ack_1 (ack_1),<\/span>
\n\u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0.ack_2 (ack_2),<\/span>
\n\u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0.ack_3 (ack_3),<\/span>
\n\u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0.req_done (req_done),<\/span>
\n\u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0.ch_0_t0_done (ch_0_t0_done),<\/span>
\n\u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0.ch_1_t0_done (ch_1_t0_done),<\/span>
\n\u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0.ch_2_t0_done (ch_2_t0_done),<\/span>
\n\u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0.ch_3_t0_done (ch_3_t0_done),<\/span>
\n\u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0.fifo_0_empty (fifo_0_empty),<\/span>
\n\u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0.fifo_1_empty (fifo_1_empty),<\/span>
\n\u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0.fifo_2_empty (fifo_2_empty),<\/span>
\n\u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0.fifo_3_empty (fifo_3_empty),<\/span>
\n\u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0.fifo_0_full (fifo_0_full),<\/span>
\n\u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0.fifo_1_full (fifo_1_full),<\/span>
\n\u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0.fifo_2_full (fifo_2_full),<\/span>
\n\u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0.fifo_3_full (fifo_3_full)<\/span>
\n);<\/span><\/p>\n

\/\/ ==============================<\/strong><\/span>
\n\/\/ 5. \u4f8b\u5316\uff1aDMA \u901a\u9053FIFO\uff084\u4e2a\u72ec\u7acbFIFO\uff09<\/strong><\/span>
\n\/\/ ==============================<\/strong><\/span>
\ndmac_channel u_dmac_channel(<\/span>
\n\u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0.clk (HCLK),<\/span>
\n\u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0.rst (HRESETn),<\/span>
\n\u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0.clr_0 (1’b0),<\/span>
\n\u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0.wr_0 (wr_fifo_0),<\/span>
\n\u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0.rd_0 (rd_fifo_0),<\/span>
\n\u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0.wdata_0 (wr_fifo_data_0),<\/span>
\n\u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0.rdata_0 (rd_fifo_data_0),<\/span>
\n\u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0.full_0 (fifo_0_full),<\/span>
\n\u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0.empty_0 (fifo_0_empty),<\/span><\/p>\n

\u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0.clr_1 (1’b0),<\/span>
\n\u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0.wr_1 (wr_fifo_1),<\/span>
\n\u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0.rd_1 (rd_fifo_1),<\/span>
\n\u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0.wdata_1 (wr_fifo_data_1),<\/span>
\n\u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0.rdata_1 (rd_fifo_data_1),<\/span>
\n\u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0.full_1 (fifo_1_full),<\/span>
\n\u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0.empty_1 (fifo_1_empty),<\/span><\/p>\n

\u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0.clr_2 (1’b0),<\/span>
\n\u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0.wr_2 (wr_fifo_2),<\/span>
\n\u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0.rd_2 (rd_fifo_2),<\/span>
\n\u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0.wdata_2 (wr_fifo_data_2),<\/span>
\n\u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0.rdata_2 (rd_fifo_data_2),<\/span>
\n\u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0.full_2 (fifo_2_full),<\/span>
\n\u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0.empty_2 (fifo_2_empty),<\/span><\/p>\n

\u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0.clr_3 (1’b0),<\/span>
\n\u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0.wr_3 (wr_fifo_3),<\/span>
\n\u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0.rd_3 (rd_fifo_3),<\/span>
\n\u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0.wdata_3 (wr_fifo_data_3),<\/span>
\n\u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0.rdata_3 (rd_fifo_data_3),<\/span>
\n\u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0.full_3 (fifo_3_full),<\/span>
\n\u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0.empty_3 (fifo_3_empty)<\/span>
\n);<\/span><\/p>\n

endmodule<\/span><\/p>\n

\u4e09\u3001\u573a\u666f\u5316\u5927\u767d\u8bdd\u7406\u89e3\uff08\u6700\u5bb9\u6613\u61c2\uff09<\/strong>
\n\u628a dmac.v \u7406\u89e3\u6210\uff1a<\/strong>
\nDMA \u6574\u680b\u5927\u697c\u7684\u603b\u8bbe\u8ba1\u5e08 + \u5305\u5de5\u5934<\/strong>
\n\u2022 dmac_intf\uff1a\u524d\u53f0\uff08CPU \u914d\u7f6e\u7a97\u53e3\uff09<\/strong>
\n\u2022 dmac_arb\uff1a\u8c03\u5ea6\u5ba4\uff08\u5206\u914d\u603b\u7ebf\uff09<\/strong>
\n\u2022 dmac_channel_ctrl\uff1a4\u4e2a\u4f5c\u4e1a\u73ed\u7ec4<\/strong>
\n\u2022 dmac_channel\uff1a\u73ed\u7ec4\u7684\u4e34\u65f6\u4ed3\u5e93\uff08FIFO\uff09<\/strong>
\n\u2022 dmac_ahb_ctrl\uff1a\u8fd0\u8f93\u961f\uff08AHB \u603b\u7ebf\uff09<\/strong>
\n\u5b8c\u6574\u5de5\u4f5c\u6d41\u7a0b\uff1a<\/strong>
\n1. CPU \u53bb\u524d\u53f0\uff08intf\uff09\u586b\u5355\uff1a\u901a\u9053\u3001\u5730\u5740\u3001\u957f\u5ea6\u3001\u65b9\u5411<\/strong>
\n2. \u8c03\u5ea6\u5ba4\uff08arb\uff09 \u6309\u4f18\u5148\u7ea7\u9009\u4e00\u4e2a\u73ed\u7ec4<\/strong>
\n3. \u73ed\u7ec4\uff08channel_ctrl\uff09 \u4ece\u4ed3\u5e93\uff08FIFO\uff09\u53d6\/\u5b58\u6570\u636e<\/strong>
\n4. \u8fd0\u8f93\u961f\uff08ahb_ctrl\uff09 \u6309 AHB \u89c4\u77e9\u642c\u8fd0\u6570\u636e<\/strong>
\n5. \u5b8c\u6210\u540e\u56de\u4f20\u5e94\u7b54\u4fe1\u53f7<\/strong><\/p>\n","protected":false},"excerpt":{"rendered":"

dmac.v = DMA \u63a7\u5236\u5668\u9876\u5c42\u4f8b\u5316\/\u8fde\u7ebf\u6a21\u5757 \u4f5c\u7528\uff1a\u628a\u4f60\u524d\u9762\u770b\u8fc7\u7684\u6240\u6709\u5b50\u6a21\u5757\u4f8b\u5316+\u63a5\u7ebf\uff0c\u62fc\u6210\u5b8c\u6574\u53ef\u7528\u7684DMA\u63a7\u5236\u5668\u3002 \u5b83\u81ea\u5df1\u4e0d\u505a\u903b\u8f91\uff0c\u53ea\u8d1f\u8d23\u642d\u67b6\u5b50\u3001\u8fde\u4fe1\u53f7\u7ebf\u3002 `timescale 1ns\/10ps \/\/ ============================== \/\/ \u6a21\u5757\uff1aDMA \u63a7\u5236\u5668\u9876\u5c42 \/\/ \u529f\u80fd\uff1a\u4f8b\u5316\u6240\u6709\u5b50\u6a21\u5757\uff0c\u5b8c\u6210\u4fe1\u53f7\u8fde\u63a5\uff0c\u6784\u6210\u5b8c\u6574DMA\u7cfb\u7edf \/\/ ============================== module dmac( \u00a0 \u00a0 \u00a0 \u00a0 \u00a0\/\/ AHB \u4ece\u673a\u63a5\u53e3\uff08CPU \u914d\u7f6e DMA \u7528\uff09 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0input HCLK, \/\/ \u65f6\u949f \u00a0 \u00a0 \u00a0 \u00a0 \u00a0input HRESETn, \/\/ \u4f4e\u7535\u5e73\u590d\u4f4d \u00a0 \u00a0 \u00a0 \u00a0 \u00a0input HSEL_SLV, \/\/ \u4ece\u673a\u9009\u4e2d \u00a0 \u00a0 \u00a0 \u00a0 \u00a0input HREADYIN_SLV, \/\/ \u4ece\u673a\u5c31\u7eea\u8f93\u5165 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0input [1:0] HTRANS_SLV, \/\/ \u4f20\u8f93\u7c7b\u578b \u00a0 \u00a0 \u00a0 \u00a0 \u00a0input [2:0] HSIZE_SLV, \/\/ \u4f4d\u5bbd \u00a0 \u00a0 \u00a0 \u00a0 \u00a0input HWRITE_SLV, \/\/ \u8bfb\u5199 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0input [31:0]HADDR_SLV, \/\/ \u5730\u5740 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0input [31:0]HWDATA_SLV, \/\/ \u5199\u6570\u636e \u00a0 \u00a0 \u00a0 \u00a0 \u00a0output HREADYOUT_SLV, \/\/ \u5c31\u7eea\u8f93\u51fa \u00a0 \u00a0 \u00a0 \u00a0 \u00a0output HRESP_SLV, \/\/ \u54cd\u5e94 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0output [31:0]HRDATA_SLV, \/\/ \u8bfb\u6570\u636e \u00a0 \u00a0 \u00a0 \u00a0 \u00a0\/\/ AHB \u4e3b\u673a\u63a5\u53e3\uff08DMA \u8bbf\u95ee\u5185\u5b58\/\u5916\u8bbe\u7528\uff09 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0output HSEL, \/\/ \u4e3b\u673a\u9009\u4e2d\u4ece\u8bbe\u5907 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0output [1:0] HTRANS, \/\/ \u4f20\u8f93\u7c7b\u578b \u00a0 \u00a0 \u00a0 \u00a0 \u00a0output [2:0] HSIZE, \/\/ \u4f4d\u5bbd \u00a0 \u00a0 \u00a0 \u00a0 \u00a0output HWRITE, \/\/ \u8bfb\u5199 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0output [31:0]HADDR, \/\/ \u5730\u5740 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0output [31:0]HWDATA, \/\/ \u5199\u6570\u636e \u00a0 \u00a0 \u00a0 \u00a0 \u00a0input HREADY_IN, \/\/ \u4ece\u8bbe\u5907\u5c31\u7eea \u00a0 \u00a0 \u00a0 \u00a0 \u00a0input HRESP, \/\/ \u54cd\u5e94 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0input [31:0]HRDATA, \/\/ \u8bfb\u6570\u636e \u00a0 \u00a0 \u00a0 \u00a0 \u00a0\/\/ \u5916\u90e8\u901a\u9053\u8bf7\u6c42\/\u5e94\u7b54\uff08\u5916\u90e8\u6a21\u5757\u89e6\u53d1DMA\uff09 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0input req_0, \u00a0 \u00a0 \u00a0 \u00a0 \u00a0output ack_0, \u00a0 \u00a0 \u00a0 \u00a0 \u00a0input req_1, \u00a0 \u00a0 \u00a0 \u00a0 \u00a0output ack_1, \u00a0 \u00a0 \u00a0 \u00a0 \u00a0input req_2, \u00a0 \u00a0 \u00a0 \u00a0 \u00a0output ack_2, \u00a0 \u00a0 \u00a0 \u00a0 \u00a0input req_3, \u00a0 \u00a0 \u00a0 \u00a0 \u00a0output ack_3 ); \/\/ ============================== \/\/ \u5185\u90e8\u8fde\u7ebf\uff08wire\uff09\uff1a\u5b50\u6a21\u5757\u4e4b\u95f4\u7684\u4fe1\u53f7\u7ebf \/\/ ============================== wire [9:0] ch_0_size, ch_1_size, ch_2_size, ch_3_size; wire [31:0] ch_0_sour, ch_0_dest; wire [31:0] ch_1_sour, ch_1_dest; wire [31:0] ch_2_sour, ch_2_dest; wire [31:0] ch_3_sour, ch_3_dest; wire ch_0_en, ch_1_en, ch_2_en, ch_3_en; wire ch_0_target, ch_1_target, ch_2_target, ch_3_target; wire wr, rd; wire [31:0] addr, wdata, rdata; wire rd_en; wire req_done; wire en_0,en_1,en_2,en_3; wire ch_0_t0_done,ch_1_t0_done,ch_2_t0_done,ch_3_t0_done; wire fifo_0_empty,fifo_1_empty,fifo_2_empty,fifo_3_empty; wire fifo_0_full,fifo_1_full,fifo_2_full,fifo_3_full; wire wr_fifo_0,wr_fifo_1,wr_fifo_2,wr_fifo_3; wire rd_fifo_0,rd_fifo_1,rd_fifo_2,rd_fifo_3; w…<\/p>\n","protected":false},"author":1,"featured_media":0,"comment_status":"open","ping_status":"open","sticky":false,"template":"","format":"standard","meta":{"footnotes":""},"categories":[1],"tags":[],"class_list":["post-1421","post","type-post","status-publish","format-standard","hentry","category-uncategorized"],"_links":{"self":[{"href":"http:\/\/www.hanhhsir.cn\/index.php\/wp-json\/wp\/v2\/posts\/1421","targetHints":{"allow":["GET"]}}],"collection":[{"href":"http:\/\/www.hanhhsir.cn\/index.php\/wp-json\/wp\/v2\/posts"}],"about":[{"href":"http:\/\/www.hanhhsir.cn\/index.php\/wp-json\/wp\/v2\/types\/post"}],"author":[{"embeddable":true,"href":"http:\/\/www.hanhhsir.cn\/index.php\/wp-json\/wp\/v2\/users\/1"}],"replies":[{"embeddable":true,"href":"http:\/\/www.hanhhsir.cn\/index.php\/wp-json\/wp\/v2\/comments?post=1421"}],"version-history":[{"count":5,"href":"http:\/\/www.hanhhsir.cn\/index.php\/wp-json\/wp\/v2\/posts\/1421\/revisions"}],"predecessor-version":[{"id":1427,"href":"http:\/\/www.hanhhsir.cn\/index.php\/wp-json\/wp\/v2\/posts\/1421\/revisions\/1427"}],"wp:attachment":[{"href":"http:\/\/www.hanhhsir.cn\/index.php\/wp-json\/wp\/v2\/media?parent=1421"}],"wp:term":[{"taxonomy":"category","embeddable":true,"href":"http:\/\/www.hanhhsir.cn\/index.php\/wp-json\/wp\/v2\/categories?post=1421"},{"taxonomy":"post_tag","embeddable":true,"href":"http:\/\/www.hanhhsir.cn\/index.php\/wp-json\/wp\/v2\/tags?post=1421"}],"curies":[{"name":"wp","href":"https:\/\/api.w.org\/{rel}","templated":true}]}}