{"id":1414,"date":"2026-05-08T21:55:57","date_gmt":"2026-05-08T13:55:57","guid":{"rendered":"http:\/\/www.hanhhsir.cn\/?p=1414"},"modified":"2026-05-08T21:56:56","modified_gmt":"2026-05-08T13:56:56","slug":"%e5%9f%ba%e4%ba%8eahb%e7%9a%84%e5%9b%9b%e9%80%9a%e9%81%93dma%e6%8e%a7%e5%88%b6%e5%99%a8%e8%ae%be%e8%ae%a1-dmac_arb-v","status":"publish","type":"post","link":"http:\/\/www.hanhhsir.cn\/index.php\/2026\/05\/08\/%e5%9f%ba%e4%ba%8eahb%e7%9a%84%e5%9b%9b%e9%80%9a%e9%81%93dma%e6%8e%a7%e5%88%b6%e5%99%a8%e8%ae%be%e8%ae%a1-dmac_arb-v\/","title":{"rendered":"\u57fa\u4e8eAHB\u7684\u56db\u901a\u9053DMA\u63a7\u5236\u5668\u8bbe\u8ba1-dmac_arb.v"},"content":{"rendered":"

dmac_arb = DMA \u4ef2\u88c1\u5668\uff084\u901a\u9053\u56fa\u5b9a\u4f18\u5148\u7ea7\u4ef2\u88c1\uff09<\/strong>
\n\u4f5c\u7528\uff1a4\u4e2aDMA\u901a\u9053\u62a21\u5957AHB\u603b\u7ebf\uff0c\u6309\u901a\u90530\u21921\u21922\u21923\u4f18\u5148\u7ea7\uff0c\u540c\u4e00\u65f6\u95f4\u53ea\u8ba91\u4e2a\u901a\u9053\u7528\u603b\u7ebf\uff0c\u4e0d\u51b2\u7a81\u3002<\/strong><\/p>\n

\/\/ ==============================<\/strong>
\n\/\/ \u6a21\u5757\uff1aDMA 4\u901a\u9053\u4ef2\u88c1\u5668<\/strong>
\n\/\/ \u529f\u80fd\uff1a4\u4e2aDMA\u901a\u9053\u6309\u4f18\u5148\u7ea7(0>1>2>3)\u4ef2\u88c1\uff0c\u540c\u4e00\u65f6\u523b\u53ea\u5141\u8bb81\u4e2a\u901a\u9053\u4f7f\u7528\u603b\u7ebf<\/strong>
\n\/\/ ==============================<\/strong>
\nmodule dmac_arb(
\n\/\/ \u65f6\u949f\u4e0e\u590d\u4f4d
\ninput clk, \/\/ \u7cfb\u7edf\u65f6\u949f
\ninput rst, \/\/ \u4f4e\u7535\u5e73\u590d\u4f4d<\/p>\n

\/\/ \u901a\u9053\u8bf7\u6c42\u4fe1\u53f7\uff08\u901a\u90530~3\u5411\u4ef2\u88c1\u5668\u53d1\u8bf7\u6c42\uff09
\ninput req_0, \/\/ \u901a\u90530\u8bf7\u6c42\u4f7f\u7528\u603b\u7ebf
\ninput req_1, \/\/ \u901a\u90531\u8bf7\u6c42
\ninput req_2, \/\/ \u901a\u90532\u8bf7\u6c42
\ninput req_3, \/\/ \u901a\u90533\u8bf7\u6c42<\/p>\n

\/\/ \u901a\u9053\u603b\u4f7f\u80fd\uff08\u5168\u5c40\u5f00\u5173\uff09
\ninput ch_0_en, \/\/ \u901a\u90530\u5168\u5c40\u4f7f\u80fd
\ninput ch_1_en,
\ninput ch_2_en,
\ninput ch_3_en,<\/p>\n

\/\/ \u76ee\u6807\u8bbe\u5907\u9009\u62e9\uff08=1\u8868\u793a\u8bbf\u95ee\u5916\u8bbe\uff0c=0\u8bbf\u95ee\u5185\u5b58\uff09
\ninput target_0,
\ninput target_1,
\ninput target_2,
\ninput target_3,<\/p>\n

\/\/ \u4ef2\u88c1\u8f93\u51fa\uff1a\u7ed9\u5bf9\u5e94\u901a\u9053\u53d1\u201c\u5141\u8bb8\u4f7f\u7528\u603b\u7ebf\u201d
\noutput reg en_0, \/\/ \u5141\u8bb8\u901a\u90530\u4f7f\u7528\u603b\u7ebf
\noutput reg en_1,
\noutput reg en_2,
\noutput reg en_3,<\/p>\n

\/\/ \u5e94\u7b54\u4fe1\u53f7\uff1a\u901a\u77e5\u901a\u9053\u201c\u672c\u6b21\u4f20\u8f93\u5b8c\u6210\u201d
\noutput reg ack_0,
\noutput reg ack_1,
\noutput reg ack_2,
\noutput reg ack_3,<\/p>\n

\/\/ \u603b\u7ebf\u4f20\u8f93\u5b8c\u6210\u4fe1\u53f7\uff08\u6765\u81eaAHB\u63a7\u5236\u5668\uff09
\ninput req_done, \/\/ AHB\u4e00\u6b21\u4f20\u8f93\u5b8c\u6210<\/p>\n

\/\/ \u901a\u9053\u521d\u59cb\u4f20\u8f93\u5b8c\u6210\u6807\u5fd7
\ninput ch_0_t0_done,
\ninput ch_1_t0_done,
\ninput ch_2_t0_done,
\ninput ch_3_t0_done,<\/p>\n

\/\/ FIFO\u7a7a\u6807\u5fd7\uff08DMA\u901a\u9053FIFO\uff09
\ninput fifo_0_empty,
\ninput fifo_1_empty,
\ninput fifo_2_empty,
\ninput fifo_3_empty,<\/p>\n

\/\/ FIFO\u6ee1\u6807\u5fd7
\ninput fifo_0_full,
\ninput fifo_1_full,
\ninput fifo_2_full,
\ninput fifo_3_full
\n);<\/p>\n

\/\/ ==============================<\/strong>
\n\/\/ \u72b6\u6001\u673a\u5b9a\u4e49\uff089\u4f4done-hot\u7f16\u7801\uff09<\/strong>
\n\/\/ IDLE\uff1a\u7a7a\u95f2<\/strong>
\n\/\/ ST_x\uff1a\u901a\u9053x\u542f\u52a8\u51c6\u5907<\/strong>
\n\/\/ W_x \uff1a\u901a\u9053x\u6b63\u5728\u5360\u7528\u603b\u7ebf\u3001\u7b49\u5f85\u5b8c\u6210<\/strong>
\n\/\/ ==============================<\/strong>
\nparameter IDLE = 9’b000000001;
\nparameter ST_0 = 9’b000000010;
\nparameter W_0 = 9’b000000100;
\nparameter ST_1 = 9’b000001000;
\nparameter W_1 = 9’b000010000;
\nparameter ST_2 = 9’b000100000;
\nparameter W_2 = 9’b001000000;
\nparameter ST_3 = 9’b010000000;
\nparameter W_3 = 9’b100000000;<\/p>\n

reg [8:0] cs; \/\/ \u5f53\u524d\u72b6\u6001 current state
\nreg [8:0] ns; \/\/ \u4e0b\u4e00\u72b6\u6001 next state<\/p>\n

\/\/ ==============================<\/strong>
\n\/\/ \u65f6\u5e8f\u903b\u8f91\uff1a\u72b6\u6001\u66f4\u65b0\uff08\u65f6\u949f\u540c\u6b65\uff09<\/strong>
\n\/\/ ==============================<\/strong>
\nalways @(posedge clk or negedge rst)
\nif (!rst)
\ncs <= IDLE; \/\/ \u590d\u4f4d\u2192\u7a7a\u95f2
\nelse
\ncs <= ns; \/\/ \u4e0b\u4e00\u72b6\u6001\u8d4b\u503c\u7ed9\u5f53\u524d\u72b6\u6001<\/p>\n

\/\/ ==============================<\/strong>
\n\/\/ \u7ec4\u5408\u903b\u8f91\uff1a\u72b6\u6001\u8df3\u8f6c\u89c4\u5219\uff08\u6838\u5fc3\u4ef2\u88c1\u903b\u8f91\uff09<\/strong>
\n\/\/ ==============================<\/strong>
\nalways @(*)
\ncase (cs)
\nIDLE:begin
\n\/\/ \u4f18\u5148\u7ea7\uff1areq_0 > req_1 > req_2 > req_3
\nif (req_0 && (~ack_0)) ns = ST_0;
\nelse if (req_1 && (~ack_1)) ns = ST_1;
\nelse if (req_2 && (~ack_2)) ns = ST_2;
\nelse if (req_3 && (~ack_3)) ns = ST_3;<\/p>\n

\/\/ \u672a\u5b8c\u6210\u521d\u59cb\u4f20\u8f93\u3001\u8bbf\u95ee\u5185\u5b58\u7684\u901a\u9053
\nelse if (ch_0_en && (~ch_0_t0_done) && (~target_0)) ns=ST_0;
\nelse if (ch_1_en && (~ch_1_t0_done) && (~target_1)) ns=ST_1;
\nelse if (ch_2_en && (~ch_2_t0_done) && (~target_2)) ns=ST_2;
\nelse if (ch_3_en && (~ch_3_t0_done) && (~target_3)) ns=ST_3;<\/p>\n

\/\/ FIFO\u975e\u7a7a\u3001\u8bbf\u95ee\u5916\u8bbe\u7684\u901a\u9053
\nelse if (ch_0_en && (~fifo_0_empty) && (target_0)) ns=ST_0;
\nelse if (ch_1_en && (~fifo_1_empty) && (target_1)) ns=ST_1;
\nelse if (ch_2_en && (~fifo_2_empty) && (target_2)) ns=ST_2;
\nelse if (ch_3_en && (~fifo_3_empty) && (target_3)) ns=ST_3;<\/p>\n

else ns = IDLE;
\nend<\/p>\n

ST_0: ns = W_0; \/\/ \u51c6\u5907\u6001\u2192\u7b49\u5f85\u4f20\u8f93\u5b8c\u6210
\nST_1: ns = W_1;
\nST_2: ns = W_2;
\nST_3: ns = W_3;<\/p>\n

\/\/ ==============================<\/strong>
\n\/\/ W_0\uff1a\u901a\u90530\u5360\u7528\u603b\u7ebf\uff0c\u7b49\u5f85req_done\u5b8c\u6210<\/strong>
\n\/\/ ==============================<\/strong>
\nW_0 :begin
\nif (~req_done) ns = W_0; \/\/ \u672a\u5b8c\u6210\u2192\u7ee7\u7eed\u7b49
\nelse if (req_1) ns = ST_1; \/\/ \u5b8c\u6210\u2192\u6309\u4f18\u5148\u7ea7\u5207\u4e0b\u4e00\u4e2a
\nelse if (req_2) ns = ST_2;
\nelse if (req_3) ns = ST_3;
\nelse if (ch_1_en && (~ch_1_t0_done) && (~target_1)) ns=ST_1;
\nelse if (ch_2_en && (~ch_2_t0_done) && (~target_2)) ns=ST_2;
\nelse if (ch_3_en && (~ch_3_t0_done) && (~target_3)) ns=ST_3;
\nelse if (ch_1_en && (~fifo_1_empty) && (target_1)) ns=ST_1;
\nelse if (ch_2_en && (~fifo_2_empty) && (target_2)) ns=ST_2;
\nelse if (ch_3_en && (~fifo_3_empty) && (target_3)) ns=ST_3;
\nelse if (req_done) ns = IDLE; \/\/ \u65e0\u8bf7\u6c42\u2192\u56de\u7a7a\u95f2
\nelse ns = W_0;
\nend<\/p>\n

W_1 :begin \/\/ \u901a\u90531\u903b\u8f91\u540cW_0
\nif (~req_done) ns = W_1;
\nelse if (req_2) ns = ST_2;
\nelse if (req_3) ns = ST_3;
\nelse if (ch_2_en && (~ch_2_t0_done) && (~target_2)) ns=ST_2;
\nelse if (ch_3_en && (~ch_3_t0_done) && (~target_3)) ns=ST_3;
\nelse if (ch_2_en && (~fifo_2_empty) && (target_2)) ns=ST_2;
\nelse if (ch_3_en && (~fifo_3_empty) && (target_3)) ns=ST_3;
\nelse if (req_done) ns = IDLE;
\nelse ns = W_1;
\nend<\/p>\n

W_2 :begin \/\/ \u901a\u90532\u903b\u8f91\u540cW_0
\nif (~req_done) ns = W_2;
\nelse if (req_3) ns = ST_3;
\nelse if (ch_3_en && (~ch_3_t0_done) && (~target_3)) ns=ST_3;
\nelse if (ch_3_en && (~fifo_3_empty) && (target_3)) ns=ST_3;
\nelse if (req_done) ns = IDLE;
\nelse ns = W_2;
\nend<\/p>\n

W_3 :begin \/\/ \u901a\u90533\uff1a\u5b8c\u6210\u76f4\u63a5\u56de\u7a7a\u95f2
\nif (~req_done) ns = W_3;
\nelse ns = IDLE;
\nend<\/p>\n

default: ns = IDLE;
\nendcase<\/p>\n

\/\/ ==============================<\/strong>
\n\/\/ \u8f93\u51fa\u901a\u9053\u4f7f\u80fd\uff1a\u8fdb\u5165W_x\u72b6\u6001\u65f6\uff0c\u6253\u5f00\u5bf9\u5e94\u901a\u9053en_x<\/strong>
\n\/\/ ==============================<\/strong>
\nalways @(posedge clk or negedge rst)
\nif (!rst) en_0 <= 0;
\nelse if (ns == W_0) en_0 <= 1; \/\/ \u72b6\u6001\u5230W_0\u2192\u5141\u8bb8\u901a\u90530\u7528\u603b\u7ebf
\nelse en_0 <= 0;<\/p>\n

always @(posedge clk or negedge rst)
\nif (!rst) en_1 <= 0;
\nelse if (ns == W_1) en_1 <= 1;
\nelse en_1 <= 0;<\/p>\n

always @(posedge clk or negedge rst)
\nif (!rst) en_2 <= 0;
\nelse if (ns == W_2) en_2 <= 1;
\nelse en_2 <= 0;<\/p>\n

always @(posedge clk or negedge rst)
\nif (!rst) en_3 <= 0;
\nelse if (ns == W_3) en_3 <= 1;
\nelse en_3 <= 0;<\/p>\n

\/\/ ==============================<\/strong>
\n\/\/ \u901a\u9053\u5b8c\u6210\u5e94\u7b54\uff1a\u4f20\u8f93\u5b8c\u6210\u65f6\u7ed9\u901a\u9053\u53d1ack_x=1<\/strong>
\n\/\/ \u3010\u6ce8\uff1a\u4ee3\u7801\u8fd9\u91cc\u6709BUG\uff0c\u6240\u6709ack\u90fd\u5224\u65ad\u4e86req_0\uff0c\u5e94\u8be5\u662f\u5bf9\u5e94req_x\u3011<\/strong>
\n\/\/ ==============================<\/strong>
\nalways @(posedge clk or negedge rst)
\nif (!rst) ack_0 <= 0;
\nelse if (cs==W_0 && req_done && req_0) ack_0 <= 1;
\nelse ack_0 <= 0;<\/p>\n

always @(posedge clk or negedge rst)
\nif (!rst) ack_1 <= 0;
\nelse if (cs==W_1 && req_done && req_0) ack_1 <= 1; \/\/ BUG\uff1a\u5e94\u5199req_1
\nelse ack_1 <= 0;<\/p>\n

always @(posedge clk or negedge rst)
\nif (!rst) ack_2 <= 0;
\nelse if (cs==W_2 && req_done && req_0) ack_2 <= 1; \/\/ BUG\uff1a\u5e94\u5199req_2
\nelse ack_2 <= 0;<\/p>\n

always @(posedge clk or negedge rst)
\nif (!rst) ack_3 <= 0;
\nelse if (cs==W_3 && req_done && req_0) ack_3 <= 1; \/\/ BUG\uff1a\u5e94\u5199req_3
\nelse ack_3 <= 0;<\/p>\n

endmodule<\/p>\n","protected":false},"excerpt":{"rendered":"

dmac_arb = DMA \u4ef2\u88c1\u5668\uff084\u901a\u9053\u56fa\u5b9a\u4f18\u5148\u7ea7\u4ef2\u88c1\uff09 \u4f5c\u7528\uff1a4\u4e2aDMA\u901a\u9053\u62a21\u5957AHB\u603b\u7ebf\uff0c\u6309\u901a\u90530\u21921\u21922\u21923\u4f18\u5148\u7ea7\uff0c\u540c\u4e00\u65f6\u95f4\u53ea\u8ba91\u4e2a\u901a\u9053\u7528\u603b\u7ebf\uff0c\u4e0d\u51b2\u7a81\u3002 \/\/ ============================== \/\/ \u6a21\u5757\uff1aDMA 4\u901a\u9053\u4ef2\u88c1\u5668 \/\/ \u529f\u80fd\uff1a4\u4e2aDMA\u901a\u9053\u6309\u4f18\u5148\u7ea7(0>1>2>3)\u4ef2\u88c1\uff0c\u540c\u4e00\u65f6\u523b\u53ea\u5141\u8bb81\u4e2a\u901a\u9053\u4f7f\u7528\u603b\u7ebf \/\/ ============================== module dmac_arb( \/\/ \u65f6\u949f\u4e0e\u590d\u4f4d input clk, \/\/ \u7cfb\u7edf\u65f6\u949f input rst, \/\/ \u4f4e\u7535\u5e73\u590d\u4f4d \/\/ \u901a\u9053\u8bf7\u6c42\u4fe1\u53f7\uff08\u901a\u90530~3\u5411\u4ef2\u88c1\u5668\u53d1\u8bf7\u6c42\uff09 input req_0, \/\/ \u901a\u90530\u8bf7\u6c42\u4f7f\u7528\u603b\u7ebf input req_1, \/\/ \u901a\u90531\u8bf7\u6c42 input req_2, \/\/ \u901a\u90532\u8bf7\u6c42 input req_3, \/\/ \u901a\u90533\u8bf7\u6c42 \/\/ \u901a\u9053\u603b\u4f7f\u80fd\uff08\u5168\u5c40\u5f00\u5173\uff09 input ch_0_en, \/\/ \u901a\u90530\u5168\u5c40\u4f7f\u80fd input ch_1_en, input ch_2_en, input ch_3_en, \/\/ \u76ee\u6807\u8bbe\u5907\u9009\u62e9\uff08=1\u8868\u793a\u8bbf\u95ee\u5916\u8bbe\uff0c=0\u8bbf\u95ee\u5185\u5b58\uff09 input target_0, input target_1, input target_2, input target_3, \/\/ \u4ef2\u88c1\u8f93\u51fa\uff1a\u7ed9\u5bf9\u5e94\u901a\u9053\u53d1\u201c\u5141\u8bb8\u4f7f\u7528\u603b\u7ebf\u201d output reg en_0, \/\/ \u5141\u8bb8\u901a\u90530\u4f7f\u7528\u603b\u7ebf output reg en_1, output reg en_2, output reg en_3, \/\/ \u5e94\u7b54\u4fe1\u53f7\uff1a\u901a\u77e5\u901a\u9053\u201c\u672c\u6b21\u4f20\u8f93\u5b8c\u6210\u201d output reg ack_0, output reg ack_1, output reg ack_2, output reg ack_3, \/\/ \u603b\u7ebf\u4f20\u8f93\u5b8c\u6210\u4fe1\u53f7\uff08\u6765\u81eaAHB\u63a7\u5236\u5668\uff09 input req_done, \/\/ AHB\u4e00\u6b21\u4f20\u8f93\u5b8c\u6210 \/\/ \u901a\u9053\u521d\u59cb\u4f20\u8f93\u5b8c\u6210\u6807\u5fd7 input ch_0_t0_done, input ch_1_t0_done, input ch_2_t0_done, input ch_3_t0_done, \/\/ FIFO\u7a7a\u6807\u5fd7\uff08DMA\u901a\u9053FIFO\uff09 input fifo_0_empty, input fifo_1_empty, input fifo_2_empty, input fifo_3_empty, \/\/ FIFO\u6ee1\u6807\u5fd7 input fifo_0_full, input fifo_1_full, input fifo_2_full, input fifo_3_full ); \/\/ ============================== \/\/ \u72b6\u6001\u673a\u5b9a\u4e49\uff089\u4f4done-hot\u7f16\u7801\uff09 \/\/ IDLE\uff1a\u7a7a\u95f2 \/\/ ST_x\uff1a\u901a\u9053x\u542f\u52a8\u51c6\u5907 \/\/ W_x \uff1a\u901a\u9053x\u6b63\u5728\u5360\u7528\u603b\u7ebf\u3001\u7b49\u5f85\u5b8c\u6210 \/\/ ============================== parameter IDLE = 9’b000000001; parameter ST_0 = 9’b000000010; parameter W_0 = 9’b000000100; parameter ST_1 = 9’b000001000; parameter W_1 = 9’b000010000; parameter ST_2 = 9’b000100000; parameter W_2 = 9’b001000000; parameter ST_3 = 9’b010000000; parameter W_3 = 9’b100000000; reg [8:0] cs; \/\/ \u5f53\u524d\u72b6\u6001 current state reg [8:0] ns; \/\/ \u4e0b\u4e00\u72b6\u6001 next state \/\/ ============================== \/\/ \u65f6\u5e8f\u903b\u8f91\uff1a\u72b6\u6001\u66f4\u65b0\uff08\u65f6\u949f\u540c\u6b65\uff09 \/\/ ============================== always @(posedge clk or negedge rst) if (!rst) cs <= IDLE; \/\/ \u590d\u4f4d\u2192\u7a7a\u95f2 else cs <= ns; \/\/ \u4e0b\u4e00\u72b6\u6001\u8d4b\u503c\u7ed9\u5f53\u524d\u72b6\u6001 \/\/ ============================== \/\/ \u7ec4\u5408\u903b\u8f91\uff1a\u72b6\u6001\u8df3\u8f6c\u89c4\u5219\uff08\u6838\u5fc3\u4ef2\u88c1\u903b\u8f91\uff09 \/\/ ============================== always @(*) case (cs) IDLE:begin \/\/ \u4f18\u5148\u7ea7\uff1areq_0 > req_1 > req_2…<\/p>\n","protected":false},"author":1,"featured_media":0,"comment_status":"open","ping_status":"open","sticky":false,"template":"","format":"standard","meta":{"footnotes":""},"categories":[1],"tags":[],"class_list":["post-1414","post","type-post","status-publish","format-standard","hentry","category-uncategorized"],"_links":{"self":[{"href":"http:\/\/www.hanhhsir.cn\/index.php\/wp-json\/wp\/v2\/posts\/1414","targetHints":{"allow":["GET"]}}],"collection":[{"href":"http:\/\/www.hanhhsir.cn\/index.php\/wp-json\/wp\/v2\/posts"}],"about":[{"href":"http:\/\/www.hanhhsir.cn\/index.php\/wp-json\/wp\/v2\/types\/post"}],"author":[{"embeddable":true,"href":"http:\/\/www.hanhhsir.cn\/index.php\/wp-json\/wp\/v2\/users\/1"}],"replies":[{"embeddable":true,"href":"http:\/\/www.hanhhsir.cn\/index.php\/wp-json\/wp\/v2\/comments?post=1414"}],"version-history":[{"count":2,"href":"http:\/\/www.hanhhsir.cn\/index.php\/wp-json\/wp\/v2\/posts\/1414\/revisions"}],"predecessor-version":[{"id":1416,"href":"http:\/\/www.hanhhsir.cn\/index.php\/wp-json\/wp\/v2\/posts\/1414\/revisions\/1416"}],"wp:attachment":[{"href":"http:\/\/www.hanhhsir.cn\/index.php\/wp-json\/wp\/v2\/media?parent=1414"}],"wp:term":[{"taxonomy":"category","embeddable":true,"href":"http:\/\/www.hanhhsir.cn\/index.php\/wp-json\/wp\/v2\/categories?post=1414"},{"taxonomy":"post_tag","embeddable":true,"href":"http:\/\/www.hanhhsir.cn\/index.php\/wp-json\/wp\/v2\/tags?post=1414"}],"curies":[{"name":"wp","href":"https:\/\/api.w.org\/{rel}","templated":true}]}}